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GATE CSE 2024 Session 2 Q57: Opcodes per addressing mode in a 32-bit instruction

Question

A processor with 16 general purpose registers uses a 32-bit instruction format. The instruction format consists of an opcode field, an addressing mode field, two register operand fields, and a 16-bit scalar field. If 8 addressing modes are to be supported, the maximum number of unique opcodes possible for every addressing mode is _________

Try it: numerical answer: type the value

Numerical answer. No negative marking.
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Answer: 32 (official GATE 2024 final answer key)

Concept used: Instruction field widths must add up to the instruction length.

First step: Registers need 4 bits each (8 total), modes need 3 bits, the scalar 16 bits; the opcode gets the rest of the 32 bits.

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Source: official GATE 2024 Session 2 CS question paper and final answer key, organised by IISc Bangalore. Question paper · Answer key

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