GATE CSE 2026 Session 1 Q16: Register dependency that causes a data hazard

Which one of the following dependencies among the register operands of different instructions can cause a data hazard in a pipelined processor?

Try it: multiple choice: exactly one correct option

Wrong answer costs 1/3 mark in GATE.

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Answer: B (official GATE 2026 final answer key)

Concept used: Pipeline data hazards arise from true dependencies (RAW); in a simple in-order pipeline WAR and WAW do not occur.

First step: Ask which dependency forces a later instruction to wait for a value an earlier one has not yet written.

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Source: official GATE 2026 Session 1 CS question paper and final answer key, organised by IIT Guwahati. Question paper · Answer key