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GATE CSE 2020 Q13: True statements about interrupts, polling and DMA

Question

Consider the following statements.

I. Daisy chaining is used to assign priorities in attending interrupts.

II. When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt.

III. In polling, the CPU periodically checks the status bits to know if any device needs its attention.

IV. During DMA, both the CPU and DMA controller can be bus masters at the same time.

Which of the above statements is/are TRUE?

Try it: multiple choice: exactly one correct option

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Answer: C (official GATE 2020 final answer key)

Concept used: Interrupt priority schemes, vectored versus polled interrupts, and bus mastership during DMA.

First step: A vectored interrupt supplies its own handler address, so no polling is needed; and only one device can own the bus at a time.

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Source: official GATE 2020 CS question paper and final answer key, organised by IIT Delhi. Question paper · Answer key

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