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GATE CSE 2025 Session 2 Q39: Main memory and cache size from tag and index bits

Question

For a direct-mapped cache, 4 bits are used for the tag field and 12 bits are used to index into a cache block. The size of each cache block is one byte. Assume that there is no other information stored for each cache block.

Which ONE of the following is the CORRECT option for the sizes of the main memory and the cache memory in this system (byte addressable), respectively?

Try it: multiple choice: exactly one correct option

Select one option
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Answer: A (official GATE 2025 final answer key)

Concept used: Address = tag + index + block offset; the number of cache lines is 2index bits2^{\text{index bits}}.

First step: With 1-byte blocks the offset is 0 bits, so addresses are 4+12=164 + 12 = 16 bits.

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Source: official GATE 2025 Session 2 CS question paper and final answer key, organised by IIT Roorkee. Question paper · Answer key

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