GATE CSE 2024 Session 2 Q31: RAW, WAR and WAW dependencies in an instruction sequence

An instruction format has the following structure:

Instruction Number: Opcode destination reg, source reg-1, source reg-2

Consider the following sequence of instructions to be executed in a pipelined processor:

I1: DIV R3, R1, R2
I2: SUB R5, R3, R4
I3: ADD R3, R5, R6
I4: MUL R7, R3, R8

Which of the following statements is/are TRUE?

Try it: multiple select: one or more correct options

Select all correct options. No negative marking, no partial marks.

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Answer: A (official GATE 2024 final answer key)

Concept used: RAW: later instruction reads what an earlier one writes; WAR: later writes what earlier reads; WAW: both write.

First step: Mark where R3 is written (I1, I3) and read (I2, I4), then name the hazard type for each listed pair.

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Source: official GATE 2024 Session 2 CS question paper and final answer key, organised by IISc Bangalore. Question paper · Answer key