GATE CSE 2023 Q33: Time for 100 instructions on a 3-stage pipeline
- Computer Organization and Architecture
- 1 mark
- NAT
- No negative marking
Question
Consider a 3-stage pipelined processor having a delay of 10 ns (nanoseconds), 20 ns, and 14 ns, for the first, second, and the third stages, respectively. Assume that there is no other delay and the processor does not suffer from any pipeline hazards. Also assume that one instruction is fetched every cycle.
The total execution time for executing 100 instructions on this processor is _______ ns.
Try it: numerical answer: type the value
Show answer and explanation
Answer: 2040 (official GATE 2023 final answer key)
Concept used: Pipeline cycle time is the slowest stage; instructions on stages take cycles.
First step: Take the cycle time as 20 ns and count cycles.
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Source: official GATE 2023 CS question paper and final answer key, organised by IIT Kanpur. Question paper · Answer key
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