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GATE CSE 2024 Session 1 Q28: Glitches in Y = X AND NOT X with gate delays

Question

Consider the circuit shown below where the gates may have propagation delays. Assume that all signal transitions occur instantaneously and that wires have no delays. Which of the following statements about the circuit is/are CORRECT?

Input X goes directly to one input of an AND gate and, through a NOT gate, to the other input; the AND output is Y
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Answer: A, C (official GATE 2024 final answer key)

Concept used: Static hazard: X⋅X‾=0X \cdot \overline{X} = 0 ideally, but the NOT gate's delay can briefly let both inputs be 1.

First step: Trace both AND inputs just after X rises from 0 to 1, while the NOT output still shows the old value.

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Source: official GATE 2024 Session 1 CS question paper and final answer key, organised by IISc Bangalore. Question paper · Answer key

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