GATE CSE 2026 Session 2 Q28: Overflow in 4-bit two's complement additions
- Digital Logic
- 1 mark
- MSQ
- No negative marking
Question
In a system, numbers are represented using 4-bit two's complement form. Consider four numbers , , and in the system.
Which of the following operations will result in arithmetic overflow?
Try it: multiple select: one or more correct options
Select all correct options. No negative marking, no partial marks.
Show answer and explanation
Answer: B, D (official GATE 2026 final answer key)
Concept used: 4-bit two's complement holds −8 to 7; overflow occurs when the true result is outside this range.
First step: Decode the numbers: , , , , then compute each result.
Full step-by-step solution
Detailed working, common mistakes and linked mock tests will be available with a free GATEiit account. Log-in is coming soon.
Share this question
Source: official GATE 2026 Session 2 CS question paper and final answer key, organised by IIT Guwahati. Question paper · Answer key
More Digital Logic PYQs
- 2026 Session 1 · Q21Expressions equivalent to (P̄ + Q) ⊕ (P̄Q)
- 2026 Session 1 · Q22Overflow with 8-bit sign-magnitude operands
- 2026 Session 1 · Q37D flip-flop inputs for a 2-bit saturating up/down counter
- 2026 Session 1 · Q48Minimal SOP forms of Σm(1,2,3,4,5,7,10,12,13,14)
- 2026 Session 2 · Q16Which identity is not a law of Boolean algebra
- 2026 Session 2 · Q34Decode the IEEE 754 single-precision value 0xC2710000