GATE CSE 2021 Set 2 Q15: 4×1 MUX implementing f = Σm(0, 1, 3, 4, 5, 6)

Digital Logic
1 mark
MCQ
−1/3 if wrong

Which one of the following circuits implements the Boolean function given below?

$f(x, y, z) = m_0 + m_1 + m_3 + m_4 + m_5 + m_6,$

where $m_i$ is the $i^{th}$ minterm.

Each option is a 4×1 multiplexer with select lines $s_1 = y$ and $s_0 = z$ and output $f$ ; the options differ only in the data inputs $I_0, I_1, I_2, I_3$ listed below.

Try it: multiple choice: exactly one correct option

Wrong answer costs 1/3 mark in GATE.

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Answer: A (official GATE 2021 final answer key)

Concept used: With $y, z$ on the select lines, each data input is $f$ restricted to that $yz$ value, written as a function of $x$ .

First step: For $yz = 10$ the minterms are $m_2$ ( $x=0$ ) and $m_6$ ( $x=1$ ); only $m_6$ is in $f$ , so $I_2 = x$ . Repeat for the other three inputs.

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Source: official GATE 2021 Set 2 CS question paper and final answer key, organised by IIT Bombay. Question paper · Answer key

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GATE CSE 2021 Set 2 Q15: 4×1 MUX implementing f = Σm(0, 1, 3, 4, 5, 6)

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